[svsm-devel] Missing X2APIC registers handling in SVSM APIC

Wang, Huibo Huibo.Wang at amd.com
Sun Mar 16 00:39:33 CET 2025


[AMD Official Use Only - AMD Internal Distribution Only]

Hi,

When I am testing SVSM with Alternate Injection enabled, there are three X2APIC registers not implemented in SVSM which is within 0x800-0x8FF (Spurious Interrupt Vector Register-0x80F, Timer Local Vector Table Entry-0x832 and Timer Initial Count Register-0x838).
But they are accessed from OVMF, what should we do about them?


Thanks,
Melody
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