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<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Georgia",serif;color:blue">The Alternate Injection protocol is not designed to be a complete APIC emulation protocol, but provides only those services required for Alternate Injection. Guests
that understand how to use the Alternate Injection protocol are expected to understand which APIC registers are associated with that protocol and which are managed elsewhere (like host AIPC MSR emulation). If you think the spec is not clear enough on which
APIC registers these are, I can add additional information.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Georgia",serif;color:blue"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Georgia",serif;color:blue">I believe the spec is clear that timer emulation is not an inherent part of the Alternate Injection protocol (this is optional, and the protocol includes a feature query
mechanism where this support could be discovered if it is ever implemented). This means that none of the timer registers, including the two that you identify below, are supported over the protocol. A guest using the Alternate Injection protocol should rout
timer MSR accesses to the host.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Georgia",serif;color:blue"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Georgia",serif;color:blue">The Spurious Vector register is largely irrelevant in any virtualized APIC (because the hardware race conditions that can lead to spurious delivery simply do not exist
in a virtualized environment), and the only reason it is ever accessed is because the hardware specification defines it. Interestingly, KVM requires a VM to configure the Spurious Vector register exactly as the specification requires, while Hyper-V ignores
it, and this difference just appeared as a COCONUT-SVSM bug last week. It’s reasonable for the SVSM to implement the Spurious Vector Register just to provide better support for OVMF, so I can prepare a PR to fix this, but it would also be reasonable for OVMF
to route accesses to this MSR directly to the host, since its contents don’t really matter anyway.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Georgia",serif;color:blue"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Georgia",serif;color:blue">-Jon<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:10.0pt;font-family:"Georgia",serif;color:blue"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Wang, Huibo <Huibo.Wang@amd.com>
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<b>Sent:</b> Saturday, March 15, 2025 4:40 PM<br>
<b>To:</b> svsm-devel@coconut-svsm.dev<br>
<b>Cc:</b> Jon Lange <jlange@microsoft.com>; Lendacky, Thomas <Thomas.Lendacky@amd.com>; Joerg Roedel <jroedel@suse.de><br>
<b>Subject:</b> [EXTERNAL] Missing X2APIC registers handling in SVSM APIC <o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p style="margin:5.0pt"><span style="font-size:10.0pt;font-family:"Calibri",sans-serif;color:blue">[AMD Official Use Only - AMD Internal Distribution Only]<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><span style="color:black">Hi,<o:p></o:p></span></p>
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<p class="MsoNormal"><span style="color:black"><o:p> </o:p></span></p>
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<p class="MsoNormal"><span style="color:black">When I am testing SVSM with Alternate Injection enabled, there are three X2APIC registers not implemented in SVSM which is within 0x800-0x8FF (Spurious Interrupt Vector Register-0x80F, Timer Local Vector Table
Entry-0x832 and Timer Initial Count Register-0x838). <o:p></o:p></span></p>
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<p class="MsoNormal"><span style="color:black">But they are accessed from OVMF, what should we do about them? <o:p></o:p></span></p>
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<p class="MsoNormal"><span style="color:black"><o:p> </o:p></span></p>
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<p class="MsoNormal"><span style="color:black"><o:p> </o:p></span></p>
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<p class="MsoNormal"><span style="color:black">Thanks,<o:p></o:p></span></p>
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<p class="MsoNormal"><span style="color:black">Melody<o:p></o:p></span></p>
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