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[AMD Official Use Only - AMD Internal Distribution Only]<br>
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Hi Jon, </div>
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I have a couple questions about the spec. </div>
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1. For the mechanism transferring control from guest firmware to guest OS, <br>
from the flow I read, I wonder how the firmware (first component) can<br>
register the use of Alternate Injection.<br>
<br>
I see there are 3 forms of the SVSM_APIC_CONFIGURE_EMULATION call:<br>
<br>
1. ECX[1:0] = 0b00, disable Alternate Injection if reg count == 0<br>
2. ECX[1:0] = 0b01, deregister the guest, if reg_count == 0, disable AI<br>
3. ECX[1:0] = 0b10, register the guest, no change to AI setting<br>
<br>
So how does the firmware (first component) register? Or, could you help me<br>
understand how do you envision this process to happen?<br>
<br>
There's text related to that in the beginning of the spec:<br>
<br>
"The SVSM is required to have knowledge of whether the first component that<br>
executes can support the Alternate Injection protocol. If the SVSM does not<br>
know that the first component to execute will support the SVSM APIC Protocol,<br>
then it must not enable Alternate Injection in the guest VMSA. If the SVSM<br>
does know that the first component to execute will support the SVSM APIC<br>
Protocol, then it will enable Alternate Injection prior to the first guest<br>
entry; the first guest component must either make use of the protocol or it<br>
must request that the protocol be disabled."<br>
<br>
I *think* this "make use of the protocol" is how you want the SVSM to detect<br>
that the first component is going to use AI and I think that "make use" is by<br>
doing SVSM_APIC_CONFIGURE_EMULATION but as far as I'm reading it, I can't find<br>
an ECX[1:0] setting which says, "I'm the first component, I'm going to use<br>
AI"?<br>
<br>
Or do you mean the first component should use some other SVSM APIC protocol<br>
call like SVSM_APIC_QUERY_FEATURES, for example?<br>
<br>
2. In SVSM APIC Protocol - Query Features section, <br>
<br>
"Bit 1 indicates support for INIT and SIPI delivery. If INIT and SIPI<br>
delivery are not supported, the guest may use INIT and SIPI signals to<br>
start additional vCPUs within the invoking VMPL. Note that even if INIT<br>
and SIPI are supported, the guest must still use the VMSA creation calls of<br>
the SVSM Core Protocol to start additional vCPUs so that the Calling Area<br>
address for each vCPU can be configured correctly."<br>
<br>
Is it possible that the marked here means "may not use" instead of "may use"?</div>
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<pre><div style="direction: ltr; font-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">Thanks,</div><div class="elementToProof" style="direction: ltr; font-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">Melody</div></pre>
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<div id="x_divRplyFwdMsg" dir="ltr"><span style="font-family: Calibri, sans-serif; font-size: 11pt; color: rgb(0, 0, 0);"><b>From:</b> Wang, Huibo<br>
<b>Sent:</b> Wednesday, November 13, 2024 5:42 PM<br>
<b>To:</b> Jon Lange <jlange@microsoft.com><br>
<b>Cc:</b> svsm-devel@coconut-svsm.dev <svsm-devel@coconut-svsm.dev>; Joerg Roedel <jroedel@suse.de>; Lendacky, Thomas <Thomas.Lendacky@amd.com><br>
<b>Subject:</b> Alternate Injection spec question</span>
<div> </div>
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<div style="direction: ltr; font-size: 11pt;">Hi Jon,<br>
<br>
Yeah, the one I have is version of May, thank you for the update.<br>
<br>
Thanks<br>
Melody<br>
<br>
-----Original Message-----<br>
From: Jon Lange <jlange@microsoft.com><br>
Sent: Wednesday, November 13, 2024 5:23 PM<br>
To: Wang, Huibo <Huibo.Wang@amd.com><br>
Cc: svsm-devel@coconut-svsm.dev; Joerg Roedel <jroedel@suse.de>; Lendacky, Thomas <Thomas.Lendacky@amd.com><br>
Subject: RE: Svsm-devel Digest, Vol 10, Issue 19<br>
<br>
[AMD Official Use Only - AMD Internal Distribution Only]<br>
<br>
I think you have an old version of the spec. The latest version (attached) has all five calls.<br>
<br>
-Jon<br>
<br>
-----Original Message-----<br>
From: Wang, Huibo <Huibo.Wang@amd.com><br>
Sent: Wednesday, November 13, 2024 12:32 PM<br>
To: Jon Lange <jlange@microsoft.com><br>
Cc: svsm-devel@coconut-svsm.dev; Joerg Roedel <jroedel@suse.de>; Lendacky, Thomas <Thomas.Lendacky@amd.com><br>
Subject: [EXTERNAL] RE: Svsm-devel Digest, Vol 10, Issue 19<br>
<br>
[You don't often get email from huibo.wang@amd.com. Learn why this is important at
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[AMD Official Use Only - AMD Internal Distribution Only]<br>
<br>
Hi Jon,<br>
<br>
For SVSM APIC Protocol changes, there are 4 listed in the spec, SVSM_APIC_QUERY_FEATURES, SVSM_APIC_READ_REGISTER, SVSM_APIC_WRITE_REGISTER, SVSM_APIC_CONFIGURE_VECTOR. In the coconut svsm github, there is one more "const SVSM_REQ_APIC_CONFIGURE: u32 = 1",
should this one also be included in the spec?<br>
<br>
Thanks<br>
Melody<br>
<br>
-----Original Message-----<br>
From: Svsm-devel <svsm-devel-bounces@coconut-svsm.dev> On Behalf Of svsm-devel-request@coconut-svsm.dev<br>
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Subject: Svsm-devel Digest, Vol 10, Issue 19<br>
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Today's Topics:<br>
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1. RFC: Alternate Injection SVSM support (Jon Lange)<br>
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----------------------------------------------------------------------<br>
<br>
Message: 1<br>
Date: Fri, 17 May 2024 04:40:24 +0000<br>
From: Jon Lange <jlange@microsoft.com><br>
To: "amd-sev-snp@lists.suse.com" <amd-sev-snp@lists.suse.com>,<br>
"svsm-devel@coconut-svsm.dev" <svsm-devel@coconut-svsm.dev><br>
Subject: [svsm-devel] RFC: Alternate Injection SVSM support<br>
Message-ID:<br>
<DS7PR21MB352462BA31B209F93F296A17CAEE2@DS7PR21MB3524.namprd21.prod.outlook.com><br>
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Content-Type: text/plain; charset="us-ascii"<br>
<br>
Attached is a specification I am proposing to handle support for Alternate Injection in SNP guests through the use of an SVSM. This document proposes changes to the AMD GHCB specification and to the AMD SVSM specification to enable the negotiation required
to make Alternate Injection work correctly.<br>
<br>
Support for this protocol will not be possible in KVM until KVM is able to include native support for multiple VMPLs with separate interrupt sources for each. That work is underway elsewhere, and my expectation is that this proposed specification will align
with the capabilities that KVM will be introducing as part of the multi-VMPL support.<br>
<br>
I will be submitting changes to COCONUT-SVSM to implement this protocol. I welcome all feedback to the spec, and will update the code to match whatever spec changes are agreed upon.<br>
<br>
-Jon<br>
<br>
<br>
<br>
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